
*** Running vivado
    with args -log design_1_ilmb_bram_if_cntlr_0.vds -m64 -product Vivado -mode batch -messageDb vivado.pb -notrace -source design_1_ilmb_bram_if_cntlr_0.tcl


****** Vivado v2019.1 (64-bit)
  **** SW Build 2552052 on Fri May 24 14:49:42 MDT 2019
  **** IP Build 2548770 on Fri May 24 18:01:18 MDT 2019
    ** Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.

source design_1_ilmb_bram_if_cntlr_0.tcl -notrace
Command: synth_design -top design_1_ilmb_bram_if_cntlr_0 -part xcku5p-ffvb676-2-e -mode out_of_context
Starting synth_design
Attempting to get a license for feature 'Synthesis' and/or device 'xcku5p'
INFO: [Common 17-349] Got license for feature 'Synthesis' and/or device 'xcku5p'
INFO: [Device 21-403] Loading part xcku5p-ffvb676-2-e
INFO: Launching helper process for spawning children vivado processes
INFO: Helper process launched with PID 6876 
---------------------------------------------------------------------------------
Starting RTL Elaboration : Time (s): cpu = 00:00:04 ; elapsed = 00:00:05 . Memory (MB): peak = 1449.266 ; gain = 59.180
---------------------------------------------------------------------------------
INFO: [Synth 8-638] synthesizing module 'design_1_ilmb_bram_if_cntlr_0' [c:/Users/Emre/Desktop/asd/project_3/project_3.srcs/sources_1/bd/design_1/ip/design_1_ilmb_bram_if_cntlr_0/synth/design_1_ilmb_bram_if_cntlr_0.vhd:84]
	Parameter C_FAMILY bound to: kintexuplus - type: string 
	Parameter C_HIGHADDR bound to: 64'b0000000000000000000000000000000000000000000000000111111111111111 
	Parameter C_BASEADDR bound to: 64'b0000000000000000000000000000000000000000000000000000000000000000 
	Parameter C_NUM_LMB bound to: 1 - type: integer 
	Parameter C_MASK bound to: 64'b0000000000000000000000000000000000000000000000000000000000000000 
	Parameter C_MASK1 bound to: 64'b0000000000000000000000000000000000000000100000000000000000000000 
	Parameter C_MASK2 bound to: 64'b0000000000000000000000000000000000000000100000000000000000000000 
	Parameter C_MASK3 bound to: 64'b0000000000000000000000000000000000000000100000000000000000000000 
	Parameter C_LMB_AWIDTH bound to: 32 - type: integer 
	Parameter C_LMB_DWIDTH bound to: 32 - type: integer 
	Parameter C_ECC bound to: 0 - type: integer 
	Parameter C_INTERCONNECT bound to: 0 - type: integer 
	Parameter C_FAULT_INJECT bound to: 0 - type: integer 
	Parameter C_CE_FAILING_REGISTERS bound to: 0 - type: integer 
	Parameter C_UE_FAILING_REGISTERS bound to: 0 - type: integer 
	Parameter C_ECC_STATUS_REGISTERS bound to: 0 - type: integer 
	Parameter C_ECC_ONOFF_REGISTER bound to: 0 - type: integer 
	Parameter C_ECC_ONOFF_RESET_VALUE bound to: 1 - type: integer 
	Parameter C_CE_COUNTER_WIDTH bound to: 0 - type: integer 
	Parameter C_WRITE_ACCESS bound to: 2 - type: integer 
	Parameter C_BRAM_AWIDTH bound to: 32 - type: integer 
	Parameter C_S_AXI_CTRL_ADDR_WIDTH bound to: 32 - type: integer 
	Parameter C_S_AXI_CTRL_DATA_WIDTH bound to: 32 - type: integer 
INFO: [Synth 8-3491] module 'lmb_bram_if_cntlr' declared at 'c:/Users/Emre/Desktop/asd/project_3/project_3.srcs/sources_1/bd/design_1/ipshared/6335/hdl/lmb_bram_if_cntlr_v4_0_vh_rfs.vhd:3119' bound to instance 'U0' of component 'lmb_bram_if_cntlr' [c:/Users/Emre/Desktop/asd/project_3/project_3.srcs/sources_1/bd/design_1/ip/design_1_ilmb_bram_if_cntlr_0/synth/design_1_ilmb_bram_if_cntlr_0.vhd:225]
INFO: [Synth 8-638] synthesizing module 'lmb_bram_if_cntlr' [c:/Users/Emre/Desktop/asd/project_3/project_3.srcs/sources_1/bd/design_1/ipshared/6335/hdl/lmb_bram_if_cntlr_v4_0_vh_rfs.vhd:3243]
	Parameter C_FAMILY bound to: kintexuplus - type: string 
	Parameter C_HIGHADDR bound to: 64'b0000000000000000000000000000000000000000000000000111111111111111 
	Parameter C_BASEADDR bound to: 64'b0000000000000000000000000000000000000000000000000000000000000000 
	Parameter C_MASK bound to: 64'b0000000000000000000000000000000000000000000000000000000000000000 
	Parameter C_MASK1 bound to: 64'b0000000000000000000000000000000000000000100000000000000000000000 
	Parameter C_MASK2 bound to: 64'b0000000000000000000000000000000000000000100000000000000000000000 
	Parameter C_MASK3 bound to: 64'b0000000000000000000000000000000000000000100000000000000000000000 
	Parameter C_LMB_AWIDTH bound to: 32 - type: integer 
	Parameter C_LMB_DWIDTH bound to: 32 - type: integer 
	Parameter C_ECC bound to: 0 - type: integer 
	Parameter C_INTERCONNECT bound to: 0 - type: integer 
	Parameter C_FAULT_INJECT bound to: 0 - type: integer 
	Parameter C_CE_FAILING_REGISTERS bound to: 0 - type: integer 
	Parameter C_UE_FAILING_REGISTERS bound to: 0 - type: integer 
	Parameter C_ECC_STATUS_REGISTERS bound to: 0 - type: integer 
	Parameter C_ECC_ONOFF_REGISTER bound to: 0 - type: integer 
	Parameter C_ECC_ONOFF_RESET_VALUE bound to: 1 - type: integer 
	Parameter C_CE_COUNTER_WIDTH bound to: 0 - type: integer 
	Parameter C_WRITE_ACCESS bound to: 2 - type: integer 
	Parameter C_NUM_LMB bound to: 1 - type: integer 
	Parameter C_BRAM_AWIDTH bound to: 32 - type: integer 
	Parameter C_S_AXI_CTRL_BASEADDR bound to: 32'b11111111111111111111111111111111 
	Parameter C_S_AXI_CTRL_HIGHADDR bound to: 32'b00000000000000000000000000000000 
	Parameter C_S_AXI_CTRL_ADDR_WIDTH bound to: 32 - type: integer 
	Parameter C_S_AXI_CTRL_DATA_WIDTH bound to: 32 - type: integer 
	Parameter C_TARGET bound to: 8 - type: integer 
	Parameter C_BASEADDR bound to: 64'b0000000000000000000000000000000000000000000000000000000000000000 
	Parameter C_MASK bound to: 64'b0000000000000000000000000000000000000000000000000000000000000000 
	Parameter C_MASK1 bound to: 64'b0000000000000000000000000000000000000000100000000000000000000000 
	Parameter C_MASK2 bound to: 64'b0000000000000000000000000000000000000000100000000000000000000000 
	Parameter C_MASK3 bound to: 64'b0000000000000000000000000000000000000000100000000000000000000000 
	Parameter C_LMB_AWIDTH bound to: 32 - type: integer 
	Parameter C_LMB_DWIDTH bound to: 32 - type: integer 
	Parameter C_ECC bound to: 0 - type: integer 
	Parameter C_NUM_LMB bound to: 1 - type: integer 
INFO: [Synth 8-3491] module 'lmb_mux' declared at 'c:/Users/Emre/Desktop/asd/project_3/project_3.srcs/sources_1/bd/design_1/ipshared/6335/hdl/lmb_bram_if_cntlr_v4_0_vh_rfs.vhd:2527' bound to instance 'lmb_mux_I' of component 'lmb_mux' [c:/Users/Emre/Desktop/asd/project_3/project_3.srcs/sources_1/bd/design_1/ipshared/6335/hdl/lmb_bram_if_cntlr_v4_0_vh_rfs.vhd:3466]
INFO: [Synth 8-638] synthesizing module 'lmb_mux' [c:/Users/Emre/Desktop/asd/project_3/project_3.srcs/sources_1/bd/design_1/ipshared/6335/hdl/lmb_bram_if_cntlr_v4_0_vh_rfs.vhd:2613]
	Parameter C_TARGET bound to: 8 - type: integer 
	Parameter C_BASEADDR bound to: 64'b0000000000000000000000000000000000000000000000000000000000000000 
	Parameter C_MASK bound to: 64'b0000000000000000000000000000000000000000000000000000000000000000 
	Parameter C_MASK1 bound to: 64'b0000000000000000000000000000000000000000100000000000000000000000 
	Parameter C_MASK2 bound to: 64'b0000000000000000000000000000000000000000100000000000000000000000 
	Parameter C_MASK3 bound to: 64'b0000000000000000000000000000000000000000100000000000000000000000 
	Parameter C_LMB_AWIDTH bound to: 32 - type: integer 
	Parameter C_LMB_DWIDTH bound to: 32 - type: integer 
	Parameter C_ECC bound to: 0 - type: integer 
	Parameter C_NUM_LMB bound to: 1 - type: integer 
	Parameter C_AW bound to: 32 - type: integer 
	Parameter C_BAR bound to: 64'b0000000000000000000000000000000000000000000000000000000000000000 
	Parameter C_MASK bound to: 64'b0000000000000000000000000000000000000000000000000000000000000000 
INFO: [Synth 8-3491] module 'pselect_mask' declared at 'c:/Users/Emre/Desktop/asd/project_3/project_3.srcs/sources_1/bd/design_1/ipshared/6335/hdl/lmb_bram_if_cntlr_v4_0_vh_rfs.vhd:2110' bound to instance 'pselect_mask_lmb' of component 'pselect_mask' [c:/Users/Emre/Desktop/asd/project_3/project_3.srcs/sources_1/bd/design_1/ipshared/6335/hdl/lmb_bram_if_cntlr_v4_0_vh_rfs.vhd:2681]
INFO: [Synth 8-638] synthesizing module 'pselect_mask' [c:/Users/Emre/Desktop/asd/project_3/project_3.srcs/sources_1/bd/design_1/ipshared/6335/hdl/lmb_bram_if_cntlr_v4_0_vh_rfs.vhd:2125]
	Parameter C_AW bound to: 32 - type: integer 
	Parameter C_BAR bound to: 64'b0000000000000000000000000000000000000000000000000000000000000000 
	Parameter C_MASK bound to: 64'b0000000000000000000000000000000000000000000000000000000000000000 
INFO: [Synth 8-256] done synthesizing module 'pselect_mask' (1#1) [c:/Users/Emre/Desktop/asd/project_3/project_3.srcs/sources_1/bd/design_1/ipshared/6335/hdl/lmb_bram_if_cntlr_v4_0_vh_rfs.vhd:2125]
INFO: [Synth 8-256] done synthesizing module 'lmb_mux' (2#1) [c:/Users/Emre/Desktop/asd/project_3/project_3.srcs/sources_1/bd/design_1/ipshared/6335/hdl/lmb_bram_if_cntlr_v4_0_vh_rfs.vhd:2613]
INFO: [Synth 8-256] done synthesizing module 'lmb_bram_if_cntlr' (3#1) [c:/Users/Emre/Desktop/asd/project_3/project_3.srcs/sources_1/bd/design_1/ipshared/6335/hdl/lmb_bram_if_cntlr_v4_0_vh_rfs.vhd:3243]
INFO: [Synth 8-256] done synthesizing module 'design_1_ilmb_bram_if_cntlr_0' (4#1) [c:/Users/Emre/Desktop/asd/project_3/project_3.srcs/sources_1/bd/design_1/ip/design_1_ilmb_bram_if_cntlr_0/synth/design_1_ilmb_bram_if_cntlr_0.vhd:84]
WARNING: [Synth 8-3331] design pselect_mask has unconnected port A[0]
WARNING: [Synth 8-3331] design pselect_mask has unconnected port A[1]
WARNING: [Synth 8-3331] design pselect_mask has unconnected port A[2]
WARNING: [Synth 8-3331] design pselect_mask has unconnected port A[3]
WARNING: [Synth 8-3331] design pselect_mask has unconnected port A[4]
WARNING: [Synth 8-3331] design pselect_mask has unconnected port A[5]
WARNING: [Synth 8-3331] design pselect_mask has unconnected port A[6]
WARNING: [Synth 8-3331] design pselect_mask has unconnected port A[7]
WARNING: [Synth 8-3331] design pselect_mask has unconnected port A[8]
WARNING: [Synth 8-3331] design pselect_mask has unconnected port A[9]
WARNING: [Synth 8-3331] design pselect_mask has unconnected port A[10]
WARNING: [Synth 8-3331] design pselect_mask has unconnected port A[11]
WARNING: [Synth 8-3331] design pselect_mask has unconnected port A[12]
WARNING: [Synth 8-3331] design pselect_mask has unconnected port A[13]
WARNING: [Synth 8-3331] design pselect_mask has unconnected port A[14]
WARNING: [Synth 8-3331] design pselect_mask has unconnected port A[15]
WARNING: [Synth 8-3331] design pselect_mask has unconnected port A[16]
WARNING: [Synth 8-3331] design pselect_mask has unconnected port A[17]
WARNING: [Synth 8-3331] design pselect_mask has unconnected port A[18]
WARNING: [Synth 8-3331] design pselect_mask has unconnected port A[19]
WARNING: [Synth 8-3331] design pselect_mask has unconnected port A[20]
WARNING: [Synth 8-3331] design pselect_mask has unconnected port A[21]
WARNING: [Synth 8-3331] design pselect_mask has unconnected port A[22]
WARNING: [Synth 8-3331] design pselect_mask has unconnected port A[23]
WARNING: [Synth 8-3331] design pselect_mask has unconnected port A[24]
WARNING: [Synth 8-3331] design pselect_mask has unconnected port A[25]
WARNING: [Synth 8-3331] design pselect_mask has unconnected port A[26]
WARNING: [Synth 8-3331] design pselect_mask has unconnected port A[27]
WARNING: [Synth 8-3331] design pselect_mask has unconnected port A[28]
WARNING: [Synth 8-3331] design pselect_mask has unconnected port A[29]
WARNING: [Synth 8-3331] design pselect_mask has unconnected port A[30]
WARNING: [Synth 8-3331] design pselect_mask has unconnected port A[31]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB_Clk
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB_Rst
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_ABus[0]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_ABus[1]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_ABus[2]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_ABus[3]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_ABus[4]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_ABus[5]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_ABus[6]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_ABus[7]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_ABus[8]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_ABus[9]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_ABus[10]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_ABus[11]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_ABus[12]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_ABus[13]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_ABus[14]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_ABus[15]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_ABus[16]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_ABus[17]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_ABus[18]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_ABus[19]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_ABus[20]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_ABus[21]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_ABus[22]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_ABus[23]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_ABus[24]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_ABus[25]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_ABus[26]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_ABus[27]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_ABus[28]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_ABus[29]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_ABus[30]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_ABus[31]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_WriteDBus[0]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_WriteDBus[1]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_WriteDBus[2]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_WriteDBus[3]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_WriteDBus[4]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_WriteDBus[5]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_WriteDBus[6]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_WriteDBus[7]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_WriteDBus[8]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_WriteDBus[9]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_WriteDBus[10]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_WriteDBus[11]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_WriteDBus[12]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_WriteDBus[13]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_WriteDBus[14]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_WriteDBus[15]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_WriteDBus[16]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_WriteDBus[17]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_WriteDBus[18]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_WriteDBus[19]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_WriteDBus[20]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_WriteDBus[21]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_WriteDBus[22]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_WriteDBus[23]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_WriteDBus[24]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_WriteDBus[25]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_WriteDBus[26]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_WriteDBus[27]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_WriteDBus[28]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_WriteDBus[29]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_WriteDBus[30]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_WriteDBus[31]
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_AddrStrobe
WARNING: [Synth 8-3331] design lmb_mux has unconnected port LMB1_ReadStrobe
INFO: [Common 17-14] Message 'Synth 8-3331' appears 100 times and further instances of the messages will be disabled. Use the Tcl command set_msg_config to change the current settings.
---------------------------------------------------------------------------------
Finished RTL Elaboration : Time (s): cpu = 00:00:06 ; elapsed = 00:00:07 . Memory (MB): peak = 1510.426 ; gain = 120.340
---------------------------------------------------------------------------------

Report Check Netlist: 
+------+------------------+-------+---------+-------+------------------+
|      |Item              |Errors |Warnings |Status |Description       |
+------+------------------+-------+---------+-------+------------------+
|1     |multi_driven_nets |      0|        0|Passed |Multi driven nets |
+------+------------------+-------+---------+-------+------------------+
---------------------------------------------------------------------------------
Start Handling Custom Attributes
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
Finished Handling Custom Attributes : Time (s): cpu = 00:00:07 ; elapsed = 00:00:07 . Memory (MB): peak = 1514.559 ; gain = 124.473
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
Finished RTL Optimization Phase 1 : Time (s): cpu = 00:00:07 ; elapsed = 00:00:07 . Memory (MB): peak = 1514.559 ; gain = 124.473
---------------------------------------------------------------------------------
INFO: [Project 1-570] Preparing netlist for logic optimization

Processing XDC Constraints
Initializing timing engine
Parsing XDC File [c:/Users/Emre/Desktop/asd/project_3/project_3.srcs/sources_1/bd/design_1/ip/design_1_ilmb_bram_if_cntlr_0/design_1_ilmb_bram_if_cntlr_0_ooc.xdc] for cell 'U0'
Finished Parsing XDC File [c:/Users/Emre/Desktop/asd/project_3/project_3.srcs/sources_1/bd/design_1/ip/design_1_ilmb_bram_if_cntlr_0/design_1_ilmb_bram_if_cntlr_0_ooc.xdc] for cell 'U0'
Parsing XDC File [C:/Users/Emre/Desktop/asd/project_3/project_3.runs/design_1_ilmb_bram_if_cntlr_0_synth_1/dont_touch.xdc]
Finished Parsing XDC File [C:/Users/Emre/Desktop/asd/project_3/project_3.runs/design_1_ilmb_bram_if_cntlr_0_synth_1/dont_touch.xdc]
Completed Processing XDC Constraints

Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 1590.668 ; gain = 0.000
INFO: [Project 1-111] Unisim Transformation Summary:
No Unisim elements were transformed.

Constraint Validation Runtime : Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.027 . Memory (MB): peak = 1590.668 ; gain = 0.000
---------------------------------------------------------------------------------
Finished Constraint Validation : Time (s): cpu = 00:00:19 ; elapsed = 00:00:20 . Memory (MB): peak = 1590.668 ; gain = 200.582
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
Start Loading Part and Timing Information
---------------------------------------------------------------------------------
Loading part: xcku5p-ffvb676-2-e
INFO: [Synth 8-6742] Reading net delay rules and data
---------------------------------------------------------------------------------
Finished Loading Part and Timing Information : Time (s): cpu = 00:00:19 ; elapsed = 00:00:20 . Memory (MB): peak = 1590.668 ; gain = 200.582
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
Start Applying 'set_property' XDC Constraints
---------------------------------------------------------------------------------
Applied set_property DONT_TOUCH = true for U0. (constraint file  C:/Users/Emre/Desktop/asd/project_3/project_3.runs/design_1_ilmb_bram_if_cntlr_0_synth_1/dont_touch.xdc, line 9).
---------------------------------------------------------------------------------
Finished applying 'set_property' XDC Constraints : Time (s): cpu = 00:00:19 ; elapsed = 00:00:20 . Memory (MB): peak = 1590.668 ; gain = 200.582
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
Finished RTL Optimization Phase 2 : Time (s): cpu = 00:00:19 ; elapsed = 00:00:20 . Memory (MB): peak = 1590.668 ; gain = 200.582
---------------------------------------------------------------------------------

Report RTL Partitions: 
+-+--------------+------------+----------+
| |RTL Partition |Replication |Instances |
+-+--------------+------------+----------+
+-+--------------+------------+----------+
---------------------------------------------------------------------------------
Start RTL Component Statistics 
---------------------------------------------------------------------------------
Detailed RTL Component Info : 
+---Registers : 
	                1 Bit    Registers := 2     
---------------------------------------------------------------------------------
Finished RTL Component Statistics 
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
Start RTL Hierarchical Component Statistics 
---------------------------------------------------------------------------------
Hierarchical RTL Component report 
Module lmb_bram_if_cntlr 
Detailed RTL Component Info : 
+---Registers : 
	                1 Bit    Registers := 2     
---------------------------------------------------------------------------------
Finished RTL Hierarchical Component Statistics
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
Start Part Resource Summary
---------------------------------------------------------------------------------
Part Resources:
DSPs: 1824 (col length:96)
BRAMs: 960 (col length: RAMB18 96 RAMB36 48)
---------------------------------------------------------------------------------
Finished Part Resource Summary
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
Start Cross Boundary and Area Optimization
---------------------------------------------------------------------------------
Warning: Parallel synthesis criteria is not met 
---------------------------------------------------------------------------------
Finished Cross Boundary and Area Optimization : Time (s): cpu = 00:00:21 ; elapsed = 00:00:22 . Memory (MB): peak = 1590.668 ; gain = 200.582
---------------------------------------------------------------------------------

Report RTL Partitions: 
+-+--------------+------------+----------+
| |RTL Partition |Replication |Instances |
+-+--------------+------------+----------+
+-+--------------+------------+----------+
---------------------------------------------------------------------------------
Start Applying XDC Timing Constraints
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
Finished Applying XDC Timing Constraints : Time (s): cpu = 00:00:35 ; elapsed = 00:00:36 . Memory (MB): peak = 2015.531 ; gain = 625.445
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
Start Timing Optimization
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
Finished Timing Optimization : Time (s): cpu = 00:00:35 ; elapsed = 00:00:36 . Memory (MB): peak = 2015.531 ; gain = 625.445
---------------------------------------------------------------------------------

Report RTL Partitions: 
+-+--------------+------------+----------+
| |RTL Partition |Replication |Instances |
+-+--------------+------------+----------+
+-+--------------+------------+----------+
---------------------------------------------------------------------------------
Start Technology Mapping
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
Finished Technology Mapping : Time (s): cpu = 00:00:35 ; elapsed = 00:00:36 . Memory (MB): peak = 2025.145 ; gain = 635.059
---------------------------------------------------------------------------------

Report RTL Partitions: 
+-+--------------+------------+----------+
| |RTL Partition |Replication |Instances |
+-+--------------+------------+----------+
+-+--------------+------------+----------+
---------------------------------------------------------------------------------
Start IO Insertion
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
Start Flattening Before IO Insertion
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
Finished Flattening Before IO Insertion
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
Start Final Netlist Cleanup
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
Finished Final Netlist Cleanup
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
Finished IO Insertion : Time (s): cpu = 00:00:38 ; elapsed = 00:00:39 . Memory (MB): peak = 2040.969 ; gain = 650.883
---------------------------------------------------------------------------------

Report Check Netlist: 
+------+------------------+-------+---------+-------+------------------+
|      |Item              |Errors |Warnings |Status |Description       |
+------+------------------+-------+---------+-------+------------------+
|1     |multi_driven_nets |      0|        0|Passed |Multi driven nets |
+------+------------------+-------+---------+-------+------------------+
---------------------------------------------------------------------------------
Start Renaming Generated Instances
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
Finished Renaming Generated Instances : Time (s): cpu = 00:00:38 ; elapsed = 00:00:39 . Memory (MB): peak = 2040.969 ; gain = 650.883
---------------------------------------------------------------------------------

Report RTL Partitions: 
+-+--------------+------------+----------+
| |RTL Partition |Replication |Instances |
+-+--------------+------------+----------+
+-+--------------+------------+----------+
---------------------------------------------------------------------------------
Start Rebuilding User Hierarchy
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
Finished Rebuilding User Hierarchy : Time (s): cpu = 00:00:38 ; elapsed = 00:00:39 . Memory (MB): peak = 2040.969 ; gain = 650.883
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
Start Renaming Generated Ports
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
Finished Renaming Generated Ports : Time (s): cpu = 00:00:38 ; elapsed = 00:00:39 . Memory (MB): peak = 2040.969 ; gain = 650.883
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
Start Handling Custom Attributes
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
Finished Handling Custom Attributes : Time (s): cpu = 00:00:38 ; elapsed = 00:00:39 . Memory (MB): peak = 2040.969 ; gain = 650.883
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
Start Renaming Generated Nets
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
Finished Renaming Generated Nets : Time (s): cpu = 00:00:38 ; elapsed = 00:00:39 . Memory (MB): peak = 2040.969 ; gain = 650.883
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
Start Writing Synthesis Report
---------------------------------------------------------------------------------

Report BlackBoxes: 
+-+--------------+----------+
| |BlackBox name |Instances |
+-+--------------+----------+
+-+--------------+----------+

Report Cell Usage: 
+------+-----+------+
|      |Cell |Count |
+------+-----+------+
|1     |LUT2 |     5|
|2     |FDRE |     2|
+------+-----+------+

Report Instance Areas: 
+------+---------+------------------+------+
|      |Instance |Module            |Cells |
+------+---------+------------------+------+
|1     |top      |                  |     7|
|2     |  U0     |lmb_bram_if_cntlr |     7|
+------+---------+------------------+------+
---------------------------------------------------------------------------------
Finished Writing Synthesis Report : Time (s): cpu = 00:00:38 ; elapsed = 00:00:39 . Memory (MB): peak = 2040.969 ; gain = 650.883
---------------------------------------------------------------------------------
Synthesis finished with 0 errors, 0 critical warnings and 321 warnings.
Synthesis Optimization Runtime : Time (s): cpu = 00:00:23 ; elapsed = 00:00:31 . Memory (MB): peak = 2040.969 ; gain = 574.773
Synthesis Optimization Complete : Time (s): cpu = 00:00:38 ; elapsed = 00:00:39 . Memory (MB): peak = 2040.969 ; gain = 650.883
INFO: [Project 1-571] Translating synthesized netlist
INFO: [Project 1-570] Preparing netlist for logic optimization
INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s).
Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2080.332 ; gain = 0.000
INFO: [Project 1-111] Unisim Transformation Summary:
No Unisim elements were transformed.

INFO: [Common 17-83] Releasing license: Synthesis
22 Infos, 100 Warnings, 0 Critical Warnings and 0 Errors encountered.
synth_design completed successfully
synth_design: Time (s): cpu = 00:00:56 ; elapsed = 00:00:59 . Memory (MB): peak = 2080.332 ; gain = 1665.043
Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2080.332 ; gain = 0.000
WARNING: [Constraints 18-5210] No constraints selected for write.
Resolution: This message can indicate that there are no constraints for the design, or it can indicate that the used_in flags are set such that the constraints are ignored. This later case is used when running synth_design to not write synthesis constraints to the resulting checkpoint. Instead, project constraints are read when the synthesized design is opened.
INFO: [Common 17-1381] The checkpoint 'C:/Users/Emre/Desktop/asd/project_3/project_3.runs/design_1_ilmb_bram_if_cntlr_0_synth_1/design_1_ilmb_bram_if_cntlr_0.dcp' has been generated.
WARNING: [Common 17-576] 'use_project_ipc' is deprecated. This option is deprecated and no longer used.
INFO: [Coretcl 2-1648] Added synthesis output to IP cache for IP design_1_ilmb_bram_if_cntlr_0, cache-ID = 90318aefa99797a4
Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2080.332 ; gain = 0.000
WARNING: [Constraints 18-5210] No constraints selected for write.
Resolution: This message can indicate that there are no constraints for the design, or it can indicate that the used_in flags are set such that the constraints are ignored. This later case is used when running synth_design to not write synthesis constraints to the resulting checkpoint. Instead, project constraints are read when the synthesized design is opened.
INFO: [Common 17-1381] The checkpoint 'C:/Users/Emre/Desktop/asd/project_3/project_3.runs/design_1_ilmb_bram_if_cntlr_0_synth_1/design_1_ilmb_bram_if_cntlr_0.dcp' has been generated.
INFO: [runtcl-4] Executing : report_utilization -file design_1_ilmb_bram_if_cntlr_0_utilization_synth.rpt -pb design_1_ilmb_bram_if_cntlr_0_utilization_synth.pb
INFO: [Common 17-206] Exiting Vivado at Fri Jan  8 11:02:50 2021...
